P4 Compiler Engineer - DPU

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THE ROLE:

Our NTSG - Network Technology Solutions Group team working with our AMD Pensando DPU product's is a leading provider of innovative solutions in the field of data center infrastructure, AI NIC (GPU-to-GPU communication) and networking technologies.

We are looking for a dynamic, energetic candidate to join the P4 Language Compiler team in the AMD Pensando DPU Group.

THE PERSON:

We are seeking a candidate who possesses strong engineering skills to tackle complex challenges in P4 compiler and language works. Familiarity with the P4 language or networking domain is not required, but it's a big plus. Come join us and be a part of the NTSG team that is making a difference!

KEY RESPONSIBILITIES:

• Develop optimizations for P4 language compiler
• Define and implement new P4 language features and extensions
• Debugging/fix existing issues and research alternative, more efficient ways to accomplish the same work
• Performance analysis
• Provide support for customers
• Participation in ASIC co-design
• Develop technical relationships with peers and partners. Stay informed of software and hardware trends and innovations, especially in the area of compilers, languages and networking technologies.

PREFERRED EXPERIENCE:

• Strong C++ skills
• Ability to write high quality code with a keen attention to detail
• Ability to test and review the code
• Experience with LLVM framework
• Familiarity with P4 language or networking domain is a big plus
• Experience with software development processes and tools such as debuggers, source code control systems (GitHub) and profilers
• Effective communication and problem-solving skills

ACADEMIC CREDENTIALS:

• Bachelor's or Master's degree in Computer Science, Computer Engineering, Electrical Engineering, or equivalent

LOCATION:

Santa Clara, CA

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