ASIC Verification Engineer

As the global leader in high-speed connectivity, Ciena is committed to a people-first approach. Our teams enjoy a culture focused on prioritizing a flexible work environment that empowers individual growth, well-being, and belonging. We're a technology company that leads with our humanity-driving our business priorities alongside meaningful social, community, and societal impact.

As an ASIC Verification Engineer at Ciena, you play a crucial role in ensuring the quality and reliability of our ASIC components. Reporting to the Senior Manager of ASIC Engineering, you will craft and implement verification strategies that are essential to achieving high-performance, error-free hardware. Your work enables the robust functionality of Ciena's advanced networking technologies.

How You Will Contribute:

• Develop robust test benches and tests for FPGAs and ASICs, utilizing advanced verification techniques to ensure design integrity.
• Assist in identifying and resolving RTL bugs, applying systematic approaches to maintain hardware efficiency and effectiveness.
• Create detailed verification models that simulate functional behaviors and predict potential failures, ensuring designs meet stringent quality standards.
• Draft comprehensive test plans that outline necessary tests and expected outcomes, guiding the verification process towards successful validation.
• Engage in thorough test plan and coverage analysis for block and SOC-level verification, ensuring comprehensive assessments and optimizations of our ASIC designs.
• Develop diagnostic software for the FPGA

The Must Haves:

• Bachelor / Master or PhD degree in Electrical Engineering coupled with proven experience in ASIC development with Verilog.
• Experience with ASIC design verification, synthesis, timing/power analysis and DFT.
• Minimum 5 years of work experience is required in ASIC Verification, including proficiency in UVM and System Verilog.
• Experience with modern SoC design architectures, ARM/MiPs type processor cores, Ethernet, Networking, and Data Communications.
• Strong debug and lab experience.

Assets:

• Knowledge of high-performance and low-power design techniques.
• Knowledge of FPGA and emulation platforms. Knowledge of SOC architecture.
• Knowledge of assertion-based formal verification.
• Proficient with a scripting language like Perl.

Salary Range:

The annual salary range for this position in California is $130,900 - $209,100.

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At Ciena, we are committed to building and fostering an environment in which our employees feel respected, valued, and heard. Ciena values the diversity of its workforce and respects its employees as individuals. We do not tolerate any form of discrimination.

Ciena is anEqual Opportunity Employer, including disability and protected veteran status.

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