New

Design/DSP/Verification Intern - Bachelor's Degree

Marvell Semiconductor, Inc.
paid holidays
United States, California, Santa Clara
5488 Marvell Lane (Show on map)
Dec 18, 2025
About Marvell Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Marvell's Design, DSP, & Verification teams span across multiple cutting-edge domains, giving you the opportunity to work on technologies that power next-generation cloud, AI, storage, and networking solutions. Interns in this organization can focus on pre-silicon emulation and verification for ODSP-related chips. Other teams focus on powering the full range of network connectivity from the optics of the AI GPU boards to top of the rack optical fibers and active copper cables of the data centers and their fabrics. Across all groups, you'll collaborate with your direct team and cross-functional partners (software, physical design, digital design, etc) to deliver robust, scalable solutions that enable Marvell's leadership in data infrastructure. What You Can Expect As a Design/DSP/Verification Intern, you could: Develop and maintain Python-based test suites for system bring-up Execute functional tests, analyzing results, and debug failing test cases Support the integration of firmware and hardware in a pre-silicon environment Create block level design specification describing its features, interfaces, data flow and behavior using timing diagrams Implement block level design using RTL Coding guidelines Run Synthesis and Lint flow to ensure timing requirement is met Learn the optical PHY module architecture and design Learn state of the art UVM and SystemVerilog-based verification environment Apply the knowledge of Object-Oriented programming and its application to UVM/system Verilog to build new features into the verification environment as well as the test suite Learn modern day techniques of formal verification as well as code and functional coverage. Collaborate with cross-functional teams across design verification, physical design, & digital design What We're Looking For Currently pursuing a Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field Completed courses focusing on logic, processor, memory system, verilog/VHDL, analog, integrated circuit design, digital logic design, SoC/ASIC design, verification principles, signals, system and signal processing Proficiency in programming & scripting languages like Python, C, C++, Perl, Java Experience with pre-silicon simulation or emulation platforms Hands-on experience with RTL integration and bring-up system Experience with debugging complex hardware/software interactions Strong analysis, problem solving, and communication skills Expected Base Pay Range (USD) 27 - 53, $ per hour. The successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions. Additional Compensation and Benefit Elements Marvell is committed to providing exceptional, comprehensive benefits that support our employees at every stage - from internship to retirement and through life's most important moments. Our offerings are built around four key pillars: financial well-being, family support, mental and physical health, and recognition. Highlights for our interns: medical, dental, and vision coverage, perks and discounts, robust mental health resources to prioritize emotional well-being, and paid holidays. Additional compensation may be available for intern PhD candidates. We look forward to sharing more with you during the interview process. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status. Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com. Interview Integrity To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews. These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process. This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment. #LI-TT1